TRANSCEIVER SYSTEM HAVING REDUCED LATENCY UNCERTAINTY

PROBLEM TO BE SOLVED: To provide a transceiver system having a reduced latency uncertainty. SOLUTION: The transceiver system has a word aligner with a latency uncertainty of zero. The system also has a bit slipper coupled with the word aligner. The bit slipper slips bits in such a manner that a tota...

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Main Authors DAVIDSON ALLAN THOMAS, MENDEL DAVID W, TURUDIC ANDY, CARVALHO NEVILLE, KANKIPATI KALYAN, ZHENG MICHAEL MENGHUI, PARK SEUNGMYON, SHUMARAYEV SERGEY, PEDERSEN BRUCE B, HOANG TIM TRI, THARMALINGAM KUMARA
Format Patent
LanguageEnglish
Published 09.07.2009
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Summary:PROBLEM TO BE SOLVED: To provide a transceiver system having a reduced latency uncertainty. SOLUTION: The transceiver system has a word aligner with a latency uncertainty of zero. The system also has a bit slipper coupled with the word aligner. The bit slipper slips bits in such a manner that a total delay caused by word alignment of the word aligner and by a bit slip of the bit slipper is constant with respect to all phases of a recovery clock. COPYRIGHT: (C)2009,JPO&INPIT
Bibliography:Application Number: JP20080322994