CIRCUIT SIMULATION METHOD FOR HIGH-WITHSTAND-VOLTAGE MOS TRANSISTOR
PROBLEM TO BE SOLVED: To achieve a model as a bidirectional MOS, and to improve simulation accuracy of high-withstand-voltage MOS. SOLUTION: Disclosed is a method in which a simulation is performed using a macro model for carrying out a simulation of a high-withstand-voltage MOSFET. The macro model...
Saved in:
| Main Author | |
|---|---|
| Format | Patent |
| Language | English |
| Published |
09.07.2009
|
| Subjects | |
| Online Access | Get full text |
Cover
Loading…
| Abstract | PROBLEM TO BE SOLVED: To achieve a model as a bidirectional MOS, and to improve simulation accuracy of high-withstand-voltage MOS. SOLUTION: Disclosed is a method in which a simulation is performed using a macro model for carrying out a simulation of a high-withstand-voltage MOSFET. The macro model is obtained by adding first and second JFETs(JN1 and JN2) to drain and source sides, respectively, of an NMOSFET; connecting one end of a first diode (D1) to a gate of the first JFET (J1) and connecting the other end of the first diode (D1) to the source of the NMOSFET; and connecting one end of a second diode (D2) to a gate of the second JFET (J2) and connecting the other end of the second diode (D2) to the drain of the MOSFET. COPYRIGHT: (C)2009,JPO&INPIT |
|---|---|
| AbstractList | PROBLEM TO BE SOLVED: To achieve a model as a bidirectional MOS, and to improve simulation accuracy of high-withstand-voltage MOS. SOLUTION: Disclosed is a method in which a simulation is performed using a macro model for carrying out a simulation of a high-withstand-voltage MOSFET. The macro model is obtained by adding first and second JFETs(JN1 and JN2) to drain and source sides, respectively, of an NMOSFET; connecting one end of a first diode (D1) to a gate of the first JFET (J1) and connecting the other end of the first diode (D1) to the source of the NMOSFET; and connecting one end of a second diode (D2) to a gate of the second JFET (J2) and connecting the other end of the second diode (D2) to the drain of the MOSFET. COPYRIGHT: (C)2009,JPO&INPIT |
| Author | SAITO FUMITOSHI |
| Author_xml | – fullname: SAITO FUMITOSHI |
| BookMark | eNrjYmDJy89L5WRwdvYMcg71DFEI9vQN9XEM8fT3U_B1DfHwd1Fw8w9S8PB099AN9wzxCA5x9HPRDfP3CXF0d1Xw9Q9WCAly9Av2DA7xD-JhYE1LzClO5YXS3AxKbq4hzh66qQX58anFBYnJqXmpJfFeAUYGBpaGpoamJmaOxkQpAgDVhC4o |
| ContentType | Patent |
| DBID | EVB |
| DatabaseName | esp@cenet |
| DatabaseTitleList | |
| Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
| DeliveryMethod | fulltext_linktorsrc |
| Discipline | Medicine Chemistry Sciences Physics |
| ExternalDocumentID | JP2009151546A |
| GroupedDBID | EVB |
| ID | FETCH-epo_espacenet_JP2009151546A3 |
| IEDL.DBID | EVB |
| IngestDate | Fri Jul 19 11:57:55 EDT 2024 |
| IsOpenAccess | true |
| IsPeerReviewed | false |
| IsScholarly | false |
| Language | English |
| LinkModel | DirectLink |
| MergedId | FETCHMERGED-epo_espacenet_JP2009151546A3 |
| Notes | Application Number: JP20070328915 |
| OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20090709&DB=EPODOC&CC=JP&NR=2009151546A |
| ParticipantIDs | epo_espacenet_JP2009151546A |
| PublicationCentury | 2000 |
| PublicationDate | 20090709 |
| PublicationDateYYYYMMDD | 2009-07-09 |
| PublicationDate_xml | – month: 07 year: 2009 text: 20090709 day: 09 |
| PublicationDecade | 2000 |
| PublicationYear | 2009 |
| RelatedCompanies | NEC ELECTRONICS CORP |
| RelatedCompanies_xml | – name: NEC ELECTRONICS CORP |
| Score | 2.7405508 |
| Snippet | PROBLEM TO BE SOLVED: To achieve a model as a bidirectional MOS, and to improve simulation accuracy of high-withstand-voltage MOS. SOLUTION: Disclosed is a... |
| SourceID | epo |
| SourceType | Open Access Repository |
| SubjectTerms | BASIC ELECTRIC ELEMENTS CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY PHYSICS SEMICONDUCTOR DEVICES |
| Title | CIRCUIT SIMULATION METHOD FOR HIGH-WITHSTAND-VOLTAGE MOS TRANSISTOR |
| URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20090709&DB=EPODOC&locale=&CC=JP&NR=2009151546A |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3dT8IwEL8gfr4pSlTUNMbsrXHC6NYHYkY32Aj7yFaQNzLGSIzJIDLjv29XQXni9S5p2kvurr_7BHhKjYRmLV3F1FioWCMvCaYCNeBM15LEKPfBy4yu5xNnpA0m7UkFPra9MHJO6Lccjig0KhX6Xkh7vfoPYlmytnL9PHsXpOVrj3csZYuOBdRTqWJ1O3YYWAFTGOsMQsWPJK_03RoxD-BQ_KP1Uh3scbdsS1nt-pTeORyF4ri8uIBKltfglG1Xr9XgxNtkvGtwLEs007UgbtRwfQmMuREbuRzFrjcayigT8mzuBBYSoA45bt_Bby53Ym76Fh4HQ272beQFMeKR6cduzIPoCh57NmcOFvea_klhOgh33tCqQzVf5tk1IELmwkbQtoDIVCOLuTFPyhkvGdHStEmM5g009hx0u5fbgLPf7ImOVXoH1eLzK7sXTriYPUjh_QCJgYOq |
| link.rule.ids | 230,309,783,888,25576,76876 |
| linkProvider | European Patent Office |
| linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1LT8JAEJ4gPvCmqFHx0RjT28YKZdseiCnbQhf7SrsgN1JKSYxJIVLj33e7gnLiOpNsdieZmf3mCfCY6omRtTQFGfpcQSp-TpDBUQPKNDVJ9HIfvMjoej52hupg3B5X4GPTCyPmhH6L4Yhco1Ku74Ww18v_IJYlaitXT9N3Tlq89FjHkjfomEM9xZCtbscOAysgMiGdQSj7keCVvlvF5h7s8z-2VqqDPeqWbSnLbZ_SO4GDkB-XF6dQyfI61Mhm9Vodjrx1xrsOh6JEM11x4loNV2dACI3IkDIppt7QFVEmybOZE1gSB3WSQ_sOeqPMiZnpW2gUuMzs25IXxBKLTD-mMQuic3jo2Yw4iN9r8ieFySDcekPrAqr5Is8uQcJ4xm2E0eYQ2VDxfKbPknLGS4bVNG1ivXkFjR0HXe_k3kPNYZ47can_2oDj30yKhhTjBqrF51d2yx1yMb0TgvwB4gKGnQ |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=CIRCUIT+SIMULATION+METHOD+FOR+HIGH-WITHSTAND-VOLTAGE+MOS+TRANSISTOR&rft.inventor=SAITO+FUMITOSHI&rft.date=2009-07-09&rft.externalDBID=A&rft.externalDocID=JP2009151546A |