CIRCUIT SIMULATION METHOD FOR HIGH-WITHSTAND-VOLTAGE MOS TRANSISTOR
PROBLEM TO BE SOLVED: To achieve a model as a bidirectional MOS, and to improve simulation accuracy of high-withstand-voltage MOS. SOLUTION: Disclosed is a method in which a simulation is performed using a macro model for carrying out a simulation of a high-withstand-voltage MOSFET. The macro model...
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Main Author | |
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Format | Patent |
Language | English |
Published |
09.07.2009
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Subjects | |
Online Access | Get full text |
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Summary: | PROBLEM TO BE SOLVED: To achieve a model as a bidirectional MOS, and to improve simulation accuracy of high-withstand-voltage MOS. SOLUTION: Disclosed is a method in which a simulation is performed using a macro model for carrying out a simulation of a high-withstand-voltage MOSFET. The macro model is obtained by adding first and second JFETs(JN1 and JN2) to drain and source sides, respectively, of an NMOSFET; connecting one end of a first diode (D1) to a gate of the first JFET (J1) and connecting the other end of the first diode (D1) to the source of the NMOSFET; and connecting one end of a second diode (D2) to a gate of the second JFET (J2) and connecting the other end of the second diode (D2) to the drain of the MOSFET. COPYRIGHT: (C)2009,JPO&INPIT |
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Bibliography: | Application Number: JP20070328915 |