SERIAL DATA COMMUNICATION SYSTEM AND IMAGE FORMING APPARATUS

PROBLEM TO BE SOLVED: To perform bulk high-speed data transmission between devices, between boards or between chips, in simple configuration, without a need to prepare a large-scaled circuit such as a CDR circuit. SOLUTION: In a serial data communication system including a data receiving means 502 f...

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Bibliographic Details
Main Authors KOZASA MADOKA, MASUI NARIHIRO
Format Patent
LanguageEnglish
Published 24.04.2008
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Summary:PROBLEM TO BE SOLVED: To perform bulk high-speed data transmission between devices, between boards or between chips, in simple configuration, without a need to prepare a large-scaled circuit such as a CDR circuit. SOLUTION: In a serial data communication system including a data receiving means 502 for receiving input data on the basis of a receiving clock and a data transmitting means 501 for transmitting transmission data to the data receiving means, the data receiving means generates a synchronizing clock with a period resulting from multiplying a period of the receiving clock and generates a phase determining signal for determining whether or not phases of the input data and the receiving clock are synchronized, and the data transmitting means generates a high-frequency clock sufficiently faster than a frequency of the receiving clock and generates, on the basis of the high-frequency clock, transmission data frequency-synchronized and phase-synchronized to the receiving clock while using the synchronizing clock and the phase determining signal. COPYRIGHT: (C)2008,JPO&INPIT
Bibliography:Application Number: JP20070005829