MANUFACTURING METHOD OF SEMICONDUCTOR CIRCUIT DEVICE

PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor circuit device in which a low resistance uniform thickness barrier metal is formed. SOLUTION: The manufacturing method of a semiconductor circuit device includes a step of forming a first film subjected to plasma treatment af...

Full description

Saved in:
Bibliographic Details
Main Author KARIYA ATSUSHI
Format Patent
LanguageEnglish
Published 21.02.2008
Subjects
Online AccessGet full text

Cover

Loading…
Abstract PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor circuit device in which a low resistance uniform thickness barrier metal is formed. SOLUTION: The manufacturing method of a semiconductor circuit device includes a step of forming a first film subjected to plasma treatment after a TiN film is deposited by a chemical vapor deposition method (CVD) with tetrakis dimethylamino titanium (TDMAT) taken as a stock material. Further, the manufacturing method of the semiconductor circuit device includes a step of forming a second film by depsositing a TiN film by the chemical vapor phase deposition method (CVD) with a flow rate of tetrakis dimethylamino titanium (TDMAT) of 2 to 5 mg per minute. COPYRIGHT: (C)2008,JPO&INPIT
AbstractList PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor circuit device in which a low resistance uniform thickness barrier metal is formed. SOLUTION: The manufacturing method of a semiconductor circuit device includes a step of forming a first film subjected to plasma treatment after a TiN film is deposited by a chemical vapor deposition method (CVD) with tetrakis dimethylamino titanium (TDMAT) taken as a stock material. Further, the manufacturing method of the semiconductor circuit device includes a step of forming a second film by depsositing a TiN film by the chemical vapor phase deposition method (CVD) with a flow rate of tetrakis dimethylamino titanium (TDMAT) of 2 to 5 mg per minute. COPYRIGHT: (C)2008,JPO&INPIT
Author KARIYA ATSUSHI
Author_xml – fullname: KARIYA ATSUSHI
BookMark eNrjYmDJy89L5WQw8XX0C3VzdA4JDfL0c1fwdQ3x8HdR8HdTCHb19XT293MJdQ7xD1Jw9gxyDvUMUXBxDfN0duVhYE1LzClO5YXS3AxKbq4hzh66qQX58anFBYnJqXmpJfFeAUYGBhYGJoaW5uaOxkQpAgAsHSnF
ContentType Patent
DBID EVB
DatabaseName esp@cenet
DatabaseTitleList
Database_xml – sequence: 1
  dbid: EVB
  name: esp@cenet
  url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP
  sourceTypes: Open Access Repository
DeliveryMethod fulltext_linktorsrc
Discipline Medicine
Chemistry
Sciences
ExternalDocumentID JP2008041977A
GroupedDBID EVB
ID FETCH-epo_espacenet_JP2008041977A3
IEDL.DBID EVB
IngestDate Fri Jul 19 11:50:51 EDT 2024
IsOpenAccess true
IsPeerReviewed false
IsScholarly false
Language English
LinkModel DirectLink
MergedId FETCHMERGED-epo_espacenet_JP2008041977A3
Notes Application Number: JP20060215347
OpenAccessLink https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20080221&DB=EPODOC&CC=JP&NR=2008041977A
ParticipantIDs epo_espacenet_JP2008041977A
PublicationCentury 2000
PublicationDate 20080221
PublicationDateYYYYMMDD 2008-02-21
PublicationDate_xml – month: 02
  year: 2008
  text: 20080221
  day: 21
PublicationDecade 2000
PublicationYear 2008
RelatedCompanies NEC ELECTRONICS CORP
RelatedCompanies_xml – name: NEC ELECTRONICS CORP
Score 2.693307
Snippet PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor circuit device in which a low resistance uniform thickness barrier metal is formed....
SourceID epo
SourceType Open Access Repository
SubjectTerms BASIC ELECTRIC ELEMENTS
CHEMICAL SURFACE TREATMENT
CHEMISTRY
COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
COATING MATERIAL WITH METALLIC MATERIAL
COATING METALLIC MATERIAL
DIFFUSION TREATMENT OF METALLIC MATERIAL
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL
METALLURGY
SEMICONDUCTOR DEVICES
SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION
Title MANUFACTURING METHOD OF SEMICONDUCTOR CIRCUIT DEVICE
URI https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20080221&DB=EPODOC&locale=&CC=JP&NR=2008041977A
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3dS8MwED_mFPVNp6JOJYj0rWi_NvtQpEta2kKbUtOxt9FsHYjQDVfx3zfpVt3T3kICl-Tgch-5-x3Ak22UvBBqTrWHhQzdmIVa6LKZGbe1BbdKrWjAdOJkEORmNLEmHfhsa2EanNCfBhxRSNRMyHvdvNer_yAWaXIr18_8Q0wt33zmEKX1jmXhqKaQkeOllFCsYOxEqZJkmzVTE9aOewCHwo4eyvwvbzySZSmrXZ3in8FRKshV9Tl0yqoHJ7htvdaD43j74y2GW-FbX4AZu0nuu5jlMoMBxR4LKEHUR--SlzQhOWY0QzjMcB4yRLxxiL1LePQ9hgNVbD_9u-w0SneOalxBt1pW5TUgqbgHXIKlzy1T48Wr8CwtQ5-9zBbSsZzfQH8Podu9q3043aRB6Kqu3UG3_vou74WurflDw6NfHb18Vw
link.rule.ids 230,309,783,888,25578,76884
linkProvider European Patent Office
linkToHtml http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3dS8MwED_mFOebTmU6P4pI34r2a64PRbakpa3rBzUdeytN14EI3XAV_32TbtU97S0kcEkOLveRu98BPBpqQTOm5iTjJeOhGy2TMoU3M6OGvKB6IWc1mI4fDJxE82b6rAWfTS1MjRP6U4MjMonKmbxX9Xu9-g9i4Tq3cv1EP9jU8tUmJhYb75gXjsoiHptWFOIQiQiZXiQG8WZNk5m1MzqAQ2ZjDznQvjUd87KU1a5OsU_hKGLkyuoMWkXZhQ5qWq914djf_niz4Vb41ueg-aMgsUeIJDyDQfAt4oRYCG3hnfMyDHCCSBgLyI1R4hIBW1MXWRfwYFsEORLbPv27bOpFO0dVL6FdLsuiBwJX3APKwdLnuibTbMg8S11V8ud8wR3L-RX09xC63rt6Dx2H-JN04gZvfTjZpEQokiLfQLv6-i5umd6t6F3Nr18aZX9H
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=MANUFACTURING+METHOD+OF+SEMICONDUCTOR+CIRCUIT+DEVICE&rft.inventor=KARIYA+ATSUSHI&rft.date=2008-02-21&rft.externalDBID=A&rft.externalDocID=JP2008041977A