SEMICONDUCTOR DEVICE
PROBLEM TO BE SOLVED: To suppress an increase of area, power consumption and access time using an ECC circuit. SOLUTION: A semiconductor device includes: a word line SWD; a first memory cell CELL0 and a second memory cell CELL1 that are connected to the word line; a first data line pair DT0 connecte...
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Main Authors | , , , , |
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Format | Patent |
Language | English |
Published |
21.02.2008
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Subjects | |
Online Access | Get full text |
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Summary: | PROBLEM TO BE SOLVED: To suppress an increase of area, power consumption and access time using an ECC circuit. SOLUTION: A semiconductor device includes: a word line SWD; a first memory cell CELL0 and a second memory cell CELL1 that are connected to the word line; a first data line pair DT0 connected to the first memory cell; a DT; and a second data line pair DB0, DB1 connected to the second memory cell. A first N-well that includes a PMOS of the first memory cell, is provided between a first P-well that includes one of NMOSs of the first memory cell and a transfer MOS and a second P-well that includes one of NMOSs of the second memory cell and a transfer MOS. A second N-well that includes a PMOS of the second memory cell, is provided between the second P-well and a third P-well that includes one of NMOSs of the second memory cell and a transfer MOS. The first memory cell and the second memory cell are allocated to different addresses, and errors are corrected at different timings. COPYRIGHT: (C)2008,JPO&INPIT |
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Bibliography: | Application Number: JP20070252943 |