SYSTEM AND METHOD FOR REDUCING INPUT CURRENT IN PHOTOFLASH CHARGER

PROBLEM TO BE SOLVED: To provide a photoflash charger that includes reduction average input current mode for suitably maintaining a satisfactorily large off-period. SOLUTION: A circuit (500) for charging photoflash suitably reduces average input to a switching regulator by an efficient method. The r...

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Bibliographic Details
Main Authors WU ALBERT M, PIETKIEWICZ STEVEN M
Format Patent
LanguageEnglish
Published 23.08.2007
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Summary:PROBLEM TO BE SOLVED: To provide a photoflash charger that includes reduction average input current mode for suitably maintaining a satisfactorily large off-period. SOLUTION: A circuit (500) for charging photoflash suitably reduces average input to a switching regulator by an efficient method. The regulator includes a transformer (512). The transformer (512) includes first/second windings. The regulator also includes a switch (516), that is closed at the start of a first part of a switching cycle and is opened at the termination of the first part of the cycle. A second part of the cycle allows the second winding to discharge a current toward a load. The switch (516) is suitable for accumulating a current in the first winding, when it is closed. The regulator also includes a delay circuit (530) for introducing a delay between the termination of the second part of the cycle and the start of a first part of the next cycle. COPYRIGHT: (C)2007,JPO&INPIT
Bibliography:Application Number: JP20060263687