FIELD EFFECT TRANSISTOR AND ITS MANUFACTURING METHOD

PROBLEM TO BE SOLVED: To provide a field effect transistor which has a high Schottky barrier to achieve a normally-off type and suppresses an increase in parasitic resistance, and to provide its manufacturing method. SOLUTION: An undoped GaN layer 102 and an n-type AlGaN layer 103 are formed on a sa...

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Bibliographic Details
Main Authors NAKAZAWA TOSHIYUKI, UEDA TETSUZO
Format Patent
LanguageEnglish
Published 16.08.2007
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Summary:PROBLEM TO BE SOLVED: To provide a field effect transistor which has a high Schottky barrier to achieve a normally-off type and suppresses an increase in parasitic resistance, and to provide its manufacturing method. SOLUTION: An undoped GaN layer 102 and an n-type AlGaN layer 103 are formed on a sapphire substrate 101 in order through epitaxial growth. A two-dimensional electron gas is produced at the upper side of the undioped GaN layer 102, and the upper side functions as the channel layer of the field effect transistor. An n-type InN layer 104 is formed in a part on the n-type AlGaN layer 103, and an Ni/Pt/Au electrode 106 is formed on the n-type InN layer 104. A Ti/Al electrode 105 is formed on the AlGaN layer 103. By this structure, a high Schottky barrier that cannot be formed in the conventional field effect transistor can be formed so that a normally-off type field effect transistor can be obtained. COPYRIGHT: (C)2007,JPO&INPIT
Bibliography:Application Number: JP20060022046