SEMICONDUCTOR PACKAGE EQUIPPED WITH SOLDER MASK DEFINED (SMD) BONDING PAD AND NON-SOLDER MASK DEFINED (NSMD) BONDING PAD, PRINTED CIRCUIT BOARD, AND SEMICONDUCTOR MODULE

• Main Authors: OH SE YONG, KIN SHIN
• Format: Patent
• Language: English
• Published: 29.03.2007
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

PROBLEM TO BE SOLVED: To provide a ball grid array semiconductor package capable of improving drop test reliability and board level TC (temperature cycle) reliability. SOLUTION: A semiconductor package 100 includes a semiconductor chip 120 and a substrate 110. The substrate 110 includes a plurality of bonding pads, and interfaces between the semiconductor chip 120 and a printed circuit board through solder balls that are electrically connected to the plurality of bonding pads. The plurality of bonding pads include a plurality of NSMD bonding pads 60 and a plurality of SMD bonding pads 50 that are alternately arranged on one surface of the substrate. The SMD bonding pads 50 having excellent drop test reliability and the NSMD bonding pads 60 with excellent board level TC reliability are alternately arranged along a line direction and/or a row direction in the predetermined region of the semiconductor package 100, and thereby the drop test reliability and the board level TC reliability of the semiconductor package 100 can be improved. COPYRIGHT: (C)2007,JPO&INPIT