METHOD, DATA PROCESSING SYSTEM, AND MEMORY CONTROLLER (DATA PROCESSING SYSTEM AND METHOD FOR ENABLING PIPELINING AND MULTIPLE OPERATION SCOPES OF I/O WRITE OPERATION)

• Main Authors: STUECHELI JEFFREY A, DALY GEORGE W JR, FIELDS JAMES S JR, GUY LYNN GUTHRIE, STARKE WILLIAM JOHN
• Format: Patent
• Language: English
• Published: 29.03.2007
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

PROBLEM TO BE SOLVED: To provide a data processing method in a cache coherent data processing system. SOLUTION: A data processing system includes at least a first processing node including an I/O controller and a second processing node including a memory controller for a memory. The memory controller receives pipelined first and second DMA write operations targeting first and second addresses in order from the I/O controller. In response to the second DMA write operation, the status of a domain symbol relating to the second address is established, and an operation scope including the first processing node is indicated. In response to the memory controller receiving a data access request specifying the second adress and having a scope excluding the first processing node, on the basis of the status of the domain symbol relating to the second address, a data access request is forcibly issued again with the scope including the first processing node. COPYRIGHT: (C)2007,JPO&INPIT