TEST CIRCUIT, TEST METHOD, PROGRAMMABLE INTEGRATED CIRCUIT WITH INSPECTION CIRCUIT, AND INSPECTION METHOD THEREFOR

• Main Author: INTO JUNICHI
• Format: Patent
• Language: English
• Published: 08.02.2007
• Subjects: MEASURING; MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES; PHYSICS; TESTING

PROBLEM TO BE SOLVED: To extract coverage information for confirming direct operation from the whole ASIC or FPGA or from a partial circuit. SOLUTION: Monitoring flip-flops 2, 3 for latching an output from a functional flip-flop 1 constituting an application circuit are provided, and a selection circuit for outputting selectively each value of the flip-flops is provided. Hereby, when the functional flip-flop 1 is operated, an H-level is held in the flip-flops 2, 3 corresponding to the operation. Then, the value is read out relative to a selective basic block by selecting the basic block by X, Y-input signals. When each value of both flip-flops is on the H-level together, the corresponding functional flip-flop 1 is determined to be tested. The operation is performed relative to all the flip-flops, This matter is scanned relative to all the flip-flops and the result is compared with a map at a design time, and thereby an un-operated flip-flop or a coverage rate can be acquired. COPYRIGHT: (C)2007,JPO&INPIT