SEMICONDUCTOR INTEGRATED CIRCUIT

PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit capable of preventing abnormal operation due to a user programming error such as reading from an unwritten address of a RAM in actual usage. SOLUTION: When an external reset signal RST is released, an internal reset signal generatio...

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Bibliographic Details
Main Authors IGARASHI TOSHIYUKI, TOMATSURI HIDEAKI, AKASAKA NOBUHIKO
Format Patent
LanguageEnglish
Published 28.12.2006
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Summary:PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit capable of preventing abnormal operation due to a user programming error such as reading from an unwritten address of a RAM in actual usage. SOLUTION: When an external reset signal RST is released, an internal reset signal generation part 2 releases an internal reset signal RST_IN. By means of a RAM initialization control part 10, an address generation counter part 11, a data generation part 12, and a WE generation part 13 start operation necessary for initializing RAMs 6-0 and 6-1 and tag RAMs 21-I and 21-D when the internal reset signal RST_IN is released, and a CPU 9 maintains the initial state until initialization of the RAMs 6-0 and 6-1 and the tag RAMs 21-I and 21-D is finished. COPYRIGHT: (C)2007,JPO&INPIT
Bibliography:Application Number: JP20050178890