INTERFACE CIRCUIT

PROBLEM TO BE SOLVED: To improve a system speed, by assembling a clock generating circuit for communication, with a plurality of SPI devices of only the hardware-circuit constitution. SOLUTION: In a system which has at least one SPI controller and external SPI device each, an interface circuit has a...

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Bibliographic Details
Main Author UEHARA SHINGO
Format Patent
LanguageEnglish
Published 02.11.2006
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
PHYSICS
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Summary:PROBLEM TO BE SOLVED: To improve a system speed, by assembling a clock generating circuit for communication, with a plurality of SPI devices of only the hardware-circuit constitution. SOLUTION: In a system which has at least one SPI controller and external SPI device each, an interface circuit has a transmitter for sending out at least one transmission frequency, generates corresponding clock frequencies by each SPI device, and transfers data with corresponding clock signals by the SPI devices to perform the data transfer at a high speed, and its circuit scale is reduced and its cost is, by omitting a buffer circuits and generation of busy signals and simplifying the circuit. COPYRIGHT: (C)2007,JPO&INPIT
Bibliography:Application Number: JP20050124126