SEMICONDUCTOR ELEMENT MOUNTING SUBSTRATE, AND ITS MANUFACTURING METHOD

PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor package for reducing working hours and improving economical efficiency by largely reducing photolithographic processes which have been performed a plurality of times in conventional semiconductor package manufacturing. SOLUTI...

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Bibliographic Details
Main Authors UEDA RYUJI, MATSUZAWA HIROSHI, KOGA OSAMU, YABUTA EIJI
Format Patent
LanguageEnglish
Published 10.08.2006
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor package for reducing working hours and improving economical efficiency by largely reducing photolithographic processes which have been performed a plurality of times in conventional semiconductor package manufacturing. SOLUTION: The semiconductor package has a substrate consisting of three layers including a photosensitive insulation resin layer 2 on the side of a semiconductor element, a metal layer 1 and a photosensitive insulation resin layer 2 on the side of a printed wiring board, a bonding pad pattern 3 opened to be electrically connected with an electrode of a semiconductor chip by wire bonding, a wiring pattern 4 for electric continuity, and a via-hole pattern 5 for electrically connecting the wiring pattern with the printed wiring board. Various kinds of predetermined via-hole patterns and the wiring patten are formed on the photosensitive insulation resin layer on the side of the printed wiring board. COPYRIGHT: (C)2006,JPO&NCIPI
Bibliography:Application Number: JP20050022932