SEMICONDUCTOR INTEGRATED CIRCUIT

• Main Authors: OTSUKA KANJI, KAJITANI KAZUHIKO
• Format: Patent
• Language: English
• Published: 08.06.2006
• Subjects: BASIC ELECTRIC ELEMENTS; BASIC ELECTRONIC CIRCUITRY; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; PULSE TECHNIQUE; SEMICONDUCTOR DEVICES

PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit that ensures high-speed switching by eliminating a state transition time caused by an increasing capacity of an MOS transistor. SOLUTION: This semiconductor integrated circuit has a pair of MOS transistors formed in the same well 22 (23) on a semiconductor substrate 20. These MOS transistors are placed in close proximity within a distance allowing electric charge exchange between drain diffusion layers D1 and D2 (D3, D4), and are wired in a way that signals IN and /IN with mutually reverse phases for these MOS transistors are applied to gates G1 and G2 (G3, G4), and common potential Vdd (Vss) is applied to gates S1 and S2 (S3, S4). In this way, high-speed switching can be performed, taking an advantage of an electric charge exchange effect between the drain diffusion layers D1 and D2 (D3, D4). COPYRIGHT: (C)2006,JPO&NCIPI