ELECTRICAL CONNECTION STRUCTURE OF SEMICONDUCTOR CHIP, AND WIRING SUBSTRATE USED FOR THE SAME

• Main Authors: DOKOCHI HISASHI, MATSUOKA HIROSHI, MIKAMI YOSHIKATSU, TSUKAGOSHI ISAO, HIROZAWA YUKIHISA
• Format: Patent
• Language: English
• Published: 09.02.2006
• Subjects: BASIC ELECTRIC ELEMENTS; CALCULATING; COMPUTING; COUNTING; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; HANDLING RECORD CARRIERS; PHYSICS; PRESENTATION OF DATA; RECOGNITION OF DATA; RECORD CARRIERS; SEMICONDUCTOR DEVICES

PROBLEM TO BE SOLVED: To provide an electrical connection structure to a wiring substrate of a semiconductor chip which allows superior connection reliability to be obtained even when the thickness of the semiconductor chip is thin, and to provide the wiring substrate used for the same. SOLUTION: The semiconductor chip 1 has many electrodes 2 in its periphery and the electrical connection structure of the wiring substrate 4 has electrodes 5 facing these. In this electrical connection structure for the semiconductor chip, the electrodes of the semiconductor chip and/or the wiring substrate project from a insulating surface. At least in an area surrounded by periphery electrodes of the semiconductor chip after their connection, projection electrodes and dummy electrodes 6 with almost equivalent heights are formed. When bonding surfaces are projected, the dummy electrodes of either of a triangle shape and an L shape, or two kinds exist in a plurality of numbers in a bonding area. Furthermore, these peaks are formed toward a central region of the bonding area. The semiconductor chip of 0.3 mm or smaller in thickness and the wiring substrate are connected with an adhesive 11. COPYRIGHT: (C)2006,JPO&NCIPI