PROCESSOR, MULTIPROCESSOR SYSTEM, PROCESSOR SYSTEM, INFORMATION PROCESSOR AND TEMPERATURE CONTROL METHOD
PROBLEM TO BE SOLVED: To solve the problem that the operation failure is caused due to the rapid rising of the chip temperature of a processor. SOLUTION: An instruction decoder 14 specifies arithmetic blocks and heating coefficients related with the execution of instructions for each instruction, an...
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Main Authors | , , , , |
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Format | Patent |
Language | English |
Published |
13.10.2005
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | PROBLEM TO BE SOLVED: To solve the problem that the operation failure is caused due to the rapid rising of the chip temperature of a processor. SOLUTION: An instruction decoder 14 specifies arithmetic blocks and heating coefficients related with the execution of instructions for each instruction, and stores them in a heating coefficient profile 20. An instruction scheduler 16 schedules the instructions based on data dependency. A heating frequency adder 32 cumulatively adds the heating coefficients to the heating frequency of the arithmetic blocks stored in an arithmetic block heating frequency register 22 according to the advance of the scheduled instructions. A heating frequency adder 34 subtracts the heating frequency of each arithmetic block of the arithmetic block heating frequency register 22 based on heat release quantity according to the lapse of a time. A hot spot detector 36 detects the arithmetic block in which the heating frequency of the arithmetic block heating frequency register 22 exceeds a predetermined threshold as a hot spot, and an instruction scheduler 16 delays the execution of such the instruction that the arithmetic block determined as the hot spot is related with the execution. COPYRIGHT: (C)2006,JPO&NCIPI |
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Bibliography: | Application Number: JP20040096410 |