SEMICONDUCTOR CHIP AND METHOD OF MANUFACTURING THE SAME

PROBLEM TO BE SOLVED: To increase the proportion occupied by polysilicon with respect to the entire chip surface, i.e., its numerical aperture, and prevent the gate electrode of a MOS transistor from thinning in its etching process, to obtain a desired gate electrode width. SOLUTION: A dummy polysil...

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Bibliographic Details
Main Authors YAMAGUCHI KOJI, OGITA SHINICHI, OTANI MICHIHIKO
Format Patent
LanguageEnglish
Published 25.08.2005
Edition7
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:PROBLEM TO BE SOLVED: To increase the proportion occupied by polysilicon with respect to the entire chip surface, i.e., its numerical aperture, and prevent the gate electrode of a MOS transistor from thinning in its etching process, to obtain a desired gate electrode width. SOLUTION: A dummy polysilicon 3 is not disposed in only empty portions between circuit forming regions A-D for forming a semiconductor element or wiring, but a dummy polysilicon 13 is disposed also between pads 2, to increase the proportion occupied by the dummy polysilicons 3, 13 to the entire surface of the semiconductor chip 1, that is to increase the numerical aperture of the polysilicon. COPYRIGHT: (C)2005,JPO&NCIPI
Bibliography:Application Number: JP20040033240