MANUFACTURING METHOD OF EPITAXIAL SILICON WAFER, AND SILICON WAFER MANUFACTURED THEREBY

PROBLEM TO BE SOLVED: To reduce the amount of germanium doped, and to suppress occurrence of mis-fit dislocation. SOLUTION: A silicon ingot where boron and germanium are doped is sliced, and a silicon wafer 11 is formed. Thermal oxidation treatment is carried out on the wafer 11, and a thermal oxide...

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Bibliographic Details
Main Authors ONO TOSHIAKI, HORAI MASATAKA
Format Patent
LanguageEnglish
Published 18.08.2005
Edition7
Subjects
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Summary:PROBLEM TO BE SOLVED: To reduce the amount of germanium doped, and to suppress occurrence of mis-fit dislocation. SOLUTION: A silicon ingot where boron and germanium are doped is sliced, and a silicon wafer 11 is formed. Thermal oxidation treatment is carried out on the wafer 11, and a thermal oxide film 12 is formed on the surface layer 11a of the wafer 11. Thus, concentration of germanium is set high in the vicinity of an interface 11c between the wafer 11 and the thermal oxide film 12. The thermal oxide film 12 is removed from the surface layer part 11a of the wafer 11. An epitaxial layer 13, formed of silicon single crystal, where boron is doped whose concentration is lower than that of boron in the wafer 11, is grown on a surface layer part 11b of the wafer 11 by an epitaxial growing method. COPYRIGHT: (C)2005,JPO&NCIPI
Bibliography:Application Number: JP20040028402