SEMICONDUCTOR MEMORY

PROBLEM TO BE SOLVED: To provide a semiconductor memory capable of reducing the access overheads of refresh while securing a sufficient refresh function. SOLUTION: In the peripheral circuit of the semiconductor memory, an internal refresh control circuit 12 is provided. In the internal refresh contr...

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Bibliographic Details
Main Authors OTA KIYOTO, KIKUKAWA HIROHITO, FUJIMOTO TOMONORI
Format Patent
LanguageEnglish
Published 09.06.2005
Edition7
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:PROBLEM TO BE SOLVED: To provide a semiconductor memory capable of reducing the access overheads of refresh while securing a sufficient refresh function. SOLUTION: In the peripheral circuit of the semiconductor memory, an internal refresh control circuit 12 is provided. In the internal refresh control circuit, a refresh basic clock 126 is generated asynchronously to an external clock in a refresh basic clock generation circuit 121 and refresh request signals 127 are activated finally in response to it. When normal access is executed in the state that the refresh request signals are activated, in an internal ROW system control circuit 124, a composite internal RAS 34 is generated by using internal refresh signals or the like. Corresponding to the composite internal RAS 34, an operation for refresh is performed in a RAS cycle. COPYRIGHT: (C)2005,JPO&NCIPI
Bibliography:Application Number: JP20030382021