WIRING STRUCTURE

PROBLEM TO BE SOLVED: To provide a semiconductor device wherein current concentration is controlled at the connection between the side face of a lower wiring and a via plug in case the via plug fails to be formed correctly landing on the lower wiring, and to provide a method for manufacturing the sa...

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Bibliographic Details
Main Authors TAKEWAKA HIROMOTO, YAMASHITA TAKASHI
Format Patent
LanguageEnglish
Published 14.10.2004
Edition7
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:PROBLEM TO BE SOLVED: To provide a semiconductor device wherein current concentration is controlled at the connection between the side face of a lower wiring and a via plug in case the via plug fails to be formed correctly landing on the lower wiring, and to provide a method for manufacturing the same. SOLUTION: A lower wiring 2a having an antireflection coating (conductor film) 2b on the upper surface is arranged on a ground insulating film 1, and an interlayer insulating film 3 is formed for covering the lower wiring 2 and the ground insulating film 1. A high-resistance layer 5 is provided at the connection between the side face of the lower wiring 2 and the via plug 4 in case the via plug 4 extending from the upper surface of the interlayer insulating film 3 to the lower wire 2 fails to be formed correctly landing on the lower wiring 2. COPYRIGHT: (C)2005,JPO&NCIPI
Bibliography:Application Number: JP20030080228