SIMOX WAFER

PROBLEM TO BE SOLVED: To provide a SIMOX wafer which can lower as much as possible contamination by Ni on the wafer surface in the device process without forcible formation of gettering site to the wafer. SOLUTION: In the SIMOX wafer, a region where the embedded oxide film does not exist is formed w...

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Bibliographic Details
Main Authors KUBOTA TSUYOSHI, SADAMITSU SHINSUKE, KIHARA YOSHIYUKI, YAMAMOTO KAZUHIRO
Format Patent
LanguageEnglish
Published 15.08.2003
Edition7
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:PROBLEM TO BE SOLVED: To provide a SIMOX wafer which can lower as much as possible contamination by Ni on the wafer surface in the device process without forcible formation of gettering site to the wafer. SOLUTION: In the SIMOX wafer, a region where the embedded oxide film does not exist is formed within a scribe line region to be cut out as the chip, the width of the region where the embedded oxide film does not exist is 2 μm or more and the width of the region where the embedded oxide film exists is 20 mm or less. This SIMOX wafer is used in the device process including the thermal treatment process where Ni diffuses 5.3 mm or more in the diffusion distance (√Dt: D=2×10-3exp(-0.47/kT), k: Bortzman's constant, T: absolute temperature, t: time (sec)). COPYRIGHT: (C)2003,JPO
Bibliography:Application Number: JP20020025674