IMAGE PROCESSING DEVICE, COMPILER USED THEREIN AND IMAGE PROCESSING METHOD

PROBLEM TO BE SOLVED: To reduce load stores and paths for processing a large amount of the number of data efficiently by scheduling the processing of image data. SOLUTION: The device is equipped with a plurality of computing pipelines for computing input image data, a switching channel that switches...

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Bibliographic Details
Main Authors HIDA KAZUHIRO, SAITO SEIICHIRO, SAITO TAKAHIRO
Format Patent
LanguageEnglish
Published 31.07.2003
Edition7
Subjects
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Summary:PROBLEM TO BE SOLVED: To reduce load stores and paths for processing a large amount of the number of data efficiently by scheduling the processing of image data. SOLUTION: The device is equipped with a plurality of computing pipelines for computing input image data, a switching channel that switches data transferring paths for making the computed result that is output from the plurality of computing pipelines input again to the plurality of computing pipelines, and a control circuit that controls the switching of the data transferring paths with the switching channel and the computing in the plurality of computing pipelines. The control circuit, while executing unit calculations containing a plurality of computations in the plurality of pipelines, controls the computing sequences of large volumes of image data by scheduling so that the plurality of computations containing (n-k+1) unit calculations from a unit calculation k (1<k<n) to a unit calculation n among unit calculations from 1 to n (n is a positive integer) do not overlap the same computing time in the same computing pipeline. COPYRIGHT: (C)2003,JPO
Bibliography:Application Number: JP20020013001