SEMICONDUCTOR STORAGE DEVICE

PROBLEM TO BE SOLVED: To provide a semiconductor storage device whose structure and manufacturing process are simple and capable of facilitating countermeasures to any software error even when a charge quantity for storage is small, and saving stand-by failure. SOLUTION: A CMOS-SRAM equipped with a...

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Bibliographic Details
Main Authors ISHIGAKI YOSHIYUKI, OBAYASHI SHIGEKI, YOKOYAMA TAKEHIRO
Format Patent
LanguageEnglish
Published 25.07.2003
Edition7
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
INFORMATION STORAGE
PHYSICS
SEMICONDUCTOR DEVICES
STATIC STORES
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Summary:PROBLEM TO BE SOLVED: To provide a semiconductor storage device whose structure and manufacturing process are simple and capable of facilitating countermeasures to any software error even when a charge quantity for storage is small, and saving stand-by failure. SOLUTION: A CMOS-SRAM equipped with a plurality of full CMOS type memory cells 1 arranged in a two-dimensional array in line and columnar directions is provided with a capacity plate 2 for reducing software error by adding a capacity to nodes ND1 and ND2. This capacity plate 2 is made common to these memory cells arranged in the columnar direction, and separated by each columnar. The capacitive conductive film of the capacity plate 2 is connected to a power supply voltage line VDD, and the voltage supply system to the capacitive conductive film is simplified. Also, when a stand-by failure occurs in the memory cell 1 in a certain column, the memory cell is substituted with a redundant memory cell. COPYRIGHT: (C)2003,JPO
Bibliography:Application Number: JP20020008663