DECODER AND DECODING METHOD OF INSTRUCTION WORD TO BE USED FOR SEMICONDUCTOR MEMORY DEVICE
PROBLEM TO BE SOLVED: To provide an instruction decoder to be used for a semiconductor memory device which can operate either as a dynamic random access memory device of a double data rate synchronization type or as a fast cycle random access memory device, and to provide a circuit related with it....
Saved in:
Main Authors | , |
---|---|
Format | Patent |
Language | English |
Published |
28.02.2003
|
Edition | 7 |
Subjects | |
Online Access | Get full text |
Cover
Loading…
Summary: | PROBLEM TO BE SOLVED: To provide an instruction decoder to be used for a semiconductor memory device which can operate either as a dynamic random access memory device of a double data rate synchronization type or as a fast cycle random access memory device, and to provide a circuit related with it. SOLUTION: In the case of operating as the dynamic random access memory device of the double data rate synchronization type, the semiconductor memory device has instruction signals CSB, RASB, CASB and WEB impressed through external CSB, RASB, CASB and WEB signal impression pins (not shown in the figure). In the case of operating as the fast cycle random access memory device, the semiconductor memory device has signals CSB and FN impressed through the CSB and RASB signal impression pins (not shown in the figure) and the address of low-order 2 bits is impressed to CASB and WEB signal impression pins (not shown in the figure). |
---|---|
Bibliography: | Application Number: JP20020210083 |