MEMORY DEVICE WITH SHORT READ TIME

• Main Author: TRAN LUNG T
• Format: Patent
• Language: English
• Published: 28.02.2003
• Edition: 7
• Subjects: INFORMATION STORAGE; PHYSICS; STATIC STORES

PROBLEM TO BE SOLVED: To reduce the read time of a memory array. SOLUTION: A memory device (50) includes a memory array (100) consisting of a memory cell (130), a word line (110) and a bit line (120) crossing with each other. At one end of an array, the bank (300) of a read/write selection switch connects the bit line selectively with a column write current source (210) and reference voltage. The bank (400) of a sense amplifier selection switch connects the bit line selectively with a sense amplifier (700) at a reference potential. Each switch in the bank of the sense amplifier selection switch is closed so that the sense amplifier senses the selected binary state of the memory cell. Switches in the bank of a read/write selection switch are closed so as to connect the selected bit line with the reference voltage. During read operation, since the bank of the sense amplifier selection switch and the bank of a read/ write selection switch operate so as to connect the end of the bit line with the reference potential, the memory array (100) stays within an equipotential state. Then, setting time caused by switching of an amplifier is no longer required and the read time is reduced.