METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To prevent a short circuit between upper and lower electrodes at the time of forming a capacitive element in a semiconductor device. SOLUTION: An insulator film 2, a lower electrode film 3, a dielectric film 4 and an upper electrode film 5 are sequentially formed on a semicondu...

Full description

Saved in:
Bibliographic Details
Main Author EJIRI YOICHI
Format Patent
LanguageEnglish
Published 31.01.2003
Edition7
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online AccessGet full text

Cover

More Information
Summary:PROBLEM TO BE SOLVED: To prevent a short circuit between upper and lower electrodes at the time of forming a capacitive element in a semiconductor device. SOLUTION: An insulator film 2, a lower electrode film 3, a dielectric film 4 and an upper electrode film 5 are sequentially formed on a semiconductor substrate 1 to form a laminated layer structure, and a photo resist is coated on the laminated layer structure by a photolithography technique to form a photo resist pattern 6 for processing of an upper electrode. Next, the upper electrode film 5 is selectively etched and removed with use of the photo resist pattern 6 as a mask to form an upper electrode pattern 5a. A photo resist pattern 7 is then formed so as to cover the upper electrode pattern 5a. Subsequently, dielectric film 4 is selectively etched and removed with use of the photo resist pattern 7 for dielectic processing as a mask to form a dielectic pattern 4a.
Bibliography:Application Number: JP20010210403