MULTILAYER SEMICONDUCTOR MODULE

• Main Authors: HOSOKAWA TAKAHARU, SHIMOE HIROSHI, OKUMURA NAOHISA, IMOTO TAKASHI
• Format: Patent
• Language: English
• Published: 10.01.2003
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

PROBLEM TO BE SOLVED: To provide a multilayer semiconductor module in which warping, stripping of a flip-chip connected semiconductor chip and cracking of a thin semiconductor chip are prevented even when a unit package is multilayered three-dimensionally. SOLUTION: A plurality of unit packages 12 each comprising a semiconductor chip 14 bonded onto a base substrate 13 through first chip adhesive 15 are laid in layer while bonding the base substrates 13 through substrate adhesive 18 different from the first chip adhesive 15 and an upper substrate 16 is bonded onto the uppermost unit package 12 through the substrate adhesive 18. The semiconductor chip 14 is bonded to the upper base substrate 13 or the upper substrate 16 by placing second chip adhesive 17 having a thermal expansion coefficient substantially the same as that of the first chip adhesive 15 on the upper surface of the semiconductor chip 14.