DETECTION CIRCUIT FOR DETECTING GENERATION OF ONE OF A PLURALITY OF DESIRED VALUES ON BUS AND METHOD FOR CONFIRMING COINCIDENCE BETWEEN PRESENT VALUE AND ONE OF THE PLURALITY OF DESIRED VALUES

PROBLEM TO BE SOLVED: To provide a circuit which decides whether a present value transmitted through a bus is equal to one of several desired values or not. SOLUTION: This circuit can include a monitor random access memory(RAM) (120) and a monitor circuit (130). Bits of desired values in the positio...

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Bibliographic Details
Main Authors NATARAJAN VENKATESH, MARULKAR RAJENDRA S
Format Patent
LanguageEnglish
Published 20.12.2002
Edition7
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:PROBLEM TO BE SOLVED: To provide a circuit which decides whether a present value transmitted through a bus is equal to one of several desired values or not. SOLUTION: This circuit can include a monitor random access memory(RAM) (120) and a monitor circuit (130). Bits of desired values in the position of a second set are stored in places (220-1 to 220-X in the monitor RAM) having the addresses formed by bits of desired values in the position of a first set. When a value ('the present value') is transmitted through the bus, bits of the present value in the position of the first set are given as an address to the monitor RAM (120) to generate bits stored in the addressed place as the output. A monitor circuit (130) compares the output of the monitor RAM (120) with bits of the present value in the position of the second set (230, 240, 250, and 260) to generate a result. This result indicates whether a desired value is generated on the bus or not.
Bibliography:Application Number: JP20020131907