SEMICONDUCTOR INTEGRATED CIRCUIT AND FAILURE DETECTING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT

PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit and its fault detecting method which can reduce the cost necessary for test by reducing the time necessary for test to divided logic circuits. SOLUTION: Selectors (g302, g305) which feed back an output signal of a storage element to...

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Bibliographic Details
Main Author KONO ICHIRO
Format Patent
LanguageEnglish
Published 27.11.2002
Edition7
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
SEMICONDUCTOR DEVICES
TESTING
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Summary:PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit and its fault detecting method which can reduce the cost necessary for test by reducing the time necessary for test to divided logic circuits. SOLUTION: Selectors (g302, g305) which feed back an output signal of a storage element to it and selectively take in the signal are arranged in a scan flip-flop (g306). By using (N+1) scan paths constituted of the scan flip-flop, a logic circuit is divided into N number of logic. Common scanning operation is performed to the divided logic (logic 1-logic N), and a test operation is performed continuously to each logic. Thereby duplication of scanning operation which has been generated can be eliminated, and as a result, the test time can be reduced.
Bibliography:Application Number: JP20010151983