SEMICONDUCTOR INTEGRATED CIRCUIT
PROBLEM TO BE SOLVED: To obtain a semiconductor integrated circuit which is provided with an easily testable mode by which test data can be outputted to the outside of a chip with small number of terminals and in which a non-volatile memory is incorporated. SOLUTION: This semiconductor integrated ci...
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Main Author | |
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Format | Patent |
Language | English |
Published |
22.11.2002
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | PROBLEM TO BE SOLVED: To obtain a semiconductor integrated circuit which is provided with an easily testable mode by which test data can be outputted to the outside of a chip with small number of terminals and in which a non-volatile memory is incorporated. SOLUTION: This semiconductor integrated circuit incorporates a non-volatile memory required for refresh operation of a DRAM or the like in a chip, turns an internal data bus signal between a volatile memory and a random logic into an intensive signal using a bus coupling circuit, and can output the signal to a chip external terminal. Thereby, memory data is outputted to the outside of the chip with the small number of terminals, and a easily testable mode by which defect is detected is obtained. |
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Bibliography: | Application Number: JP20010136589 |