MULTIPROCESSOR SYSTEM DEVICE

PROBLEM TO BE SOLVED: To provide a multiprocessor system device, with which a compiler can easily perform static scheduling and packet transfer with no collision can be attained corresponding to a general simultaneous access pattern. SOLUTION: Respective processor elements are connected by a multist...

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Bibliographic Details
Main Authors MORIMURA TOMOHIRO, AMANO HIDEHARU
Format Patent
LanguageEnglish
Published 13.09.2002
Edition7
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:PROBLEM TO BE SOLVED: To provide a multiprocessor system device, with which a compiler can easily perform static scheduling and packet transfer with no collision can be attained corresponding to a general simultaneous access pattern. SOLUTION: Respective processor elements are connected by a multistage interconnection network in a hierarchical structure, the compiler previously performs static scheduling to respective switch elements comprising the multistage interconnection network, and the multistage interconnection network in the hierarchical structure is emulated with no collision. Further, when performing the packet transfer within one Clos network by using the Clos network for the basic network of the multistage interconnection network in the hierarchical structure, when scheduling is performed to switch elements SE0-SE3 of the exchanger of level 1, a packet, which is failed in the arbitration, is transferred by using the idle switch of the other switch element in the switch elements SE0-SE3.
Bibliography:Application Number: JP20010056475