MULTILAYER WIRING BOARD AND MANUFACTURING METHOD THEREOF

PROBLEM TO BE SOLVED: To provide a multilayer wiring board and a manufacturing method thereof where no insulating core board falls nor a bump cracks when a bump- fitted copper foil is laminated on the insulating core board. SOLUTION: The copper foil 13 is laminated on the insulating core substrate 1...

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Bibliographic Details
Main Author AKAI SHINICHI
Format Patent
LanguageEnglish
Published 06.09.2002
Edition7
Subjects
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Summary:PROBLEM TO BE SOLVED: To provide a multilayer wiring board and a manufacturing method thereof where no insulating core board falls nor a bump cracks when a bump- fitted copper foil is laminated on the insulating core board. SOLUTION: The copper foil 13 is laminated on the insulating core substrate 10 bearing a wiring pattern 11 via an insulating prepreg 12. A conductive bump 14 formed on the copper foil 13 is engaged with the insulating prepreg 12 so as to be compressively jointed to the wiring pattern 11 of the insulating core substrate 10. Consequently, a wiring pattern of the copper foil 13 is formed in the multilayer board. On the pressure joint surface of the wiring pattern 11 against the tip of the conductive bump 14, a recess or hole is formed as a bump joint recess 21 which is smaller than that of the pressure joint surface.
Bibliography:Application Number: JP20010052157