SEMICONDUCTOR WAFER, SEMICONDUCTOR CHIP, SEMICONDUCTOR DEVICE AND PRODUCING METHOD OF SEMICONDUCTOR DEVICE

• Main Authors: HATASAWA TAKAHIRO, OKADA TERUTAKA, HONMA KAZUKI, KITAJIMA FUMIAKI, MOTOMATSU HIROYUKI, HARUYAMA KATSUHIRO
• Format: Patent
• Language: English
• Published: 07.06.2002
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; INFORMATION STORAGE; MEASURING; MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES; PHYSICS; SEMICONDUCTOR DEVICES; STATIC STORES; TESTING

PROBLEM TO BE SOLVED: To provide an electric-featured examination technique which can shorten the time of the prove test after the wafer level barn in, which can prevent the flow of substandard article to the assembling process, and which can easily analyze the cause of outbreak of failure after the delivery to the customer. SOLUTION: The MCP loads two semiconductor chips, the flash memory and the SRAM. When the wafer level barn in at the semiconductor chip of flash memory is performed, collectively contact check is operated on the input and output pad of each semiconductor chip. Also, the erase/right mode and read mode is operated toward the memory alley of each semiconductor chip, following the step S201-S211. The record data of results of these tests is wrote on the semiconductor chip of flash memory. At the next prove test process, the record data wrote in the process of wafer level barn-in is read out, and the prove test is continued only about the good semiconductor chip.