PLATING METHOD, PLATING STRUCTURE, METHOD FOR PRODUCING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE
PROBLEM TO BE SOLVED: To provide a plating method and a plating structure by which good buring excellent in adhesive properties and adhesive strength can be performed into wiring grooves and connecting holes formed on a substrate in semiconductor device and to provide a method for producing semicond...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
19.02.2002
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | PROBLEM TO BE SOLVED: To provide a plating method and a plating structure by which good buring excellent in adhesive properties and adhesive strength can be performed into wiring grooves and connecting holes formed on a substrate in semiconductor device and to provide a method for producing semiconductor device, and a semiconductor device. SOLUTION: A first seed layer 25 is formed on a barrier layer 24 in an electroless plating solution by the electroplating of copper, and successively, the electroplating of copper is continuously performed as a substrate is dipped into the electroless plating solution, by which the first seed layer 25 functions as a catalytic layer to form a second seed layer 26 thereon, and further, copper is burried into a recessed part 23 by electroless plating or electroplating. As a result, a plating layer high in adhesive properties and adhesive strength between metals can be formed without requiring the catalyzing treatment of electroless plating, a step coverage satisfactory even to a high aspect ratio can be obtained, and the generation of voids can be suppressed. |
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Bibliography: | Application Number: JP20000235481 |