DATA PROCESSING PROCESSOR

• Main Authors: YAMATO TETSUYA, YAMADA HIROSHI, HASE AKIRA, SUGITA NORIHIKO, HORI JINICHI
• Format: Patent
• Language: English
• Published: 06.07.2001
• Edition: 7
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

PROBLEM TO BE SOLVED: To provide a data processing processor having a bus arbitrating device for prohibiting any channel in which the necessity of real time processing is low from using a bus regardless of that a channel in which the necessity of real time processing is high is issuing a request for the use of a bus. SOLUTION: In a bus arbitrating device 8 of a processor 1, channels in which the necessity of real time processing is high are provided with timers 16-18 for counting-down a use permission time, and channels in which the necessity of real time processing is low are provided with registers 14 and 15. A value larger than the maximum value of the timer is set in the register value. At the time of bus arbitration, each timer value is compared with the register value, and the permission of the use of a bus is applied to the channel whose value is smaller. Therefore, it is possible to prohibit any channel in which the necessary of real time processing is low from using a bus driving the use of a bus is being requested by the channel in which the necessity of real time processing is high.