VIDEO REDUCING/ENLARGING DEVICE

• Main Authors: MURATA TOSHINORI, HIRAHATA SHIGERU, TAKADA HARUKI, TORIGOE SHINOBU, KATSUMATA KENJI, ISHIBASHI KOICHI, EDA TAKANORI
• Format: Patent
• Language: English
• Published: 30.03.2001
• Edition: 7
• Subjects: ELECTRIC COMMUNICATION TECHNIQUE; ELECTRICITY; PICTORIAL COMMUNICATION, e.g. TELEVISION

PROBLEM TO BE SOLVED: To provide video matched to the aspect ratio of the screen of a display device by reducing/enlarging entire video into any arbitrary size. SOLUTION: A video signal is written in a memory 103 by a write clock from an input terminal 118. A clock generating circuit 119 supplies a read clock having about 4/3-fold frequency of the write clock to the memory 103. A vertical enlargement control circuit 110 reads the video signal out of the memory 103 in a line cycle corresponding to an enlargement scale. In the similar cycle, the write of a one-line memory 105 is stopped and the line delay output of the output signal of the memory 103 is provided. According to a control signal from the vertical enlargement control circuit 110, a vertical interpolating circuit 106 prepares a scan line signal through interpolating operation. A horizontal direction is similarly controlled by a horizontal enlargement control circuit 113.