SEMICONDUCTOR DEVICE

• Main Authors: ICHIKAWA HIROSHI, TADOKORO HARUKO, SONODA TAKAHIRO, SAKATA TAKESHI, NAGASHIMA YASUSHI, MORITA SADAYUKI, HANZAWA SATORU
• Format: Patent
• Language: English
• Published: 30.03.2001
• Edition: 7
• Subjects: INFORMATION STORAGE; PHYSICS; STATIC STORES

PROBLEM TO BE SOLVED: To transmit a signal which is adapted to the changeover of an operating mode by a method wherein, when a prescribed selection signal is in a first state, an output clock signal from a first clock-signal formation circuit is made effective, and, when the prescribed selection signal is in a second state different from the first state, an output clock signal from a second clock-signal formation circuit is made effective. SOLUTION: A selection circuit 5 receives as a selection control signal a mode signal MODE from a mode-signal generation circuit 68, it selects either a clock signal 6 from a clock reproduction circuit 3 or a clock signal 7 from a clock formation circuit 4, and it outputs an internal clock signal DCLK. Then, when a mode signal is at an L level, the clock signal 7 is outputted as the clock signal DCLK. When the mode signal is at an H level, the clock signal 6 is outputted as the clock signal DCLK. As a result, in the case of an SDRAM according to SDR specifications, the internal clock signal DCLK is formed based on the output signal of the clock generation circuit 4.