BUS ARBITRATION CIRCUIT

• Main Author: SUGA TOSHIKI
• Format: Patent
• Language: English
• Published: 16.03.2001
• Edition: 7
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

PROBLEM TO BE SOLVED: To provide a bus arbitration circuit capable of smoothing data transfer of an input/output function by acquiring rights to use buses in order of bus use requests for plural bus use request origins and improving fundamental performance of a system. SOLUTION: In this bus arbitration circuit 7, the bus use request signals 201 to 204 are stored in the order of their request by providing plural storage areas 301 to 304 to store the bus use request signals 201 to 204 from plural bus use request origin devices 101 to 104 by a storage request signal 13 from a bus use request receiving circuit 1 in a storage circuit 3 and a function to successively shift the stored contents of them from the lowest order side to the highest order side, when the contents are simultaneously received, they are stored in a preset priority order, bus request output signals 15 according to the bus use request signals 201 to 204 are outputted to a high order bus 31 by a request order and arbitration with the highest order bus 31 is efficiently performed.