SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, AND LAYOUT METHOD AND APPARATUS THEREFOR

• Main Authors: NAKATSU ISAO, KOZAI ATSUKO
• Format: Patent
• Language: English
• Published: 12.01.2001
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device, and a layout designing method and apparatus which allow the number of grids of a primitive cell to be selected arbitrarily to thereby minimize their layout area. SOLUTION: A primitive cell has a core section wherein a circuit for implementing a function unique to the primitive cell is formed, and power source wiring sections for electrical connection between its core section and power source wiring and between its core section and the core section of another primitive cell. Each primitive cell has the same core section construction. A small number of primitive cells are prepared, which have a plurality of different kinds of power source wiring sections, each having a different number of signal lines that can be laid out. During layout, a primitive cell is selected from the small number of primitive cells, the selected primitive cell having a number of signal lines that can be actually laid out.