METHOD FOR FORMING WIRING AND MANUFACTURE FOR SEMICONDUCTOR DEVICE

• Main Author: MATSUMOTO KAZUHARU
• Format: Patent
• Language: English
• Published: 12.01.2001
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

PROBLEM TO BE SOLVED: To prevent a reflection preventing film on a wiring from being etched, and prevent variations or halations of a line width of a connection hole due to reflection, and prevent lack of uniformity of the connection hole or variations of connection resistance even when an interlayer film and a flattening film are formed on a structure formed with the reflection preventing film on the wiring, and the flattening film and the interlayer film are etched back, and the interlayer film is further formed, and the connection hole is formed therein. SOLUTION: In a method for forming a wiring, an interlayer film 15 and a flattening film 16 and formed on a structure formed with a reflection preventing film 12 on a wiring 11, the flattening film and the interlayer film are etched back, and the interlayer film is further formed. A connection hole is formed therein, in a structure which further comprises an etching stopper layer 13 for protecting the reflection preventing film on the structure formed with the reflection preventing film on the wiring, and the above connection hole forming step is performed. The wiring is formed by the above wiring forming method.