DIGITAL HIGH FREQUENCY ANALOG HYBRID IC CHIP, IC PACKAGE AND DIGITAL HIGH FREQUENCY ANALOG HYBRID IC
PROBLEM TO BE SOLVED: To reduce the size by grounding at least one I/O pad of a digital circuit provided between the I/O pads of high frequency signal I/O terminals adjacent to digital I/O terminals through a capacitor which can be considered to be short-circuited at high frequency and to be opened...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
07.11.2000
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | PROBLEM TO BE SOLVED: To reduce the size by grounding at least one I/O pad of a digital circuit provided between the I/O pads of high frequency signal I/O terminals adjacent to digital I/O terminals through a capacitor which can be considered to be short-circuited at high frequency and to be opened for a digital signal. SOLUTION: As a pin for isolating I/O pins 1a at a high frequency analog section, an I/O pin 1c for digital signal is provided at a position where a pin having only ground function is normally provided. It is grounded, on the outside of a package, through a capacitor 7 which can be considered as a sufficiently low impedance at a high frequency used in a high frequency analog and as a sufficiently high impedance at the frequency of a digital signal handled in a digital circuit. Consequently, a function for isolating the I/O pins 1a at the high frequency analog section can be provided without causing a damage on the function of the digital I/O pin 1c as the I/O pin of a digital circuit. |
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Bibliography: | Application Number: JP19990118908 |