PROCESSOR WITH BIST FUNCTION

PROBLEM TO BE SOLVED: To test high-speed operation and to test a combination of many instructions by making a random-number instruction generating means generate a test instruction at random according to a test signal which is inputted from outside. SOLUTION: The random-number instruction generating...

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Bibliographic Details
Main Authors HIKONE KAZUFUMI, HATAKEYAMA KAZUMI, NAKAO NORINOBU, HOTTA TAKASHI
Format Patent
LanguageEnglish
Published 20.10.2000
Edition7
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
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Summary:PROBLEM TO BE SOLVED: To test high-speed operation and to test a combination of many instructions by making a random-number instruction generating means generate a test instruction at random according to a test signal which is inputted from outside. SOLUTION: The random-number instruction generating means is composed of an instruction storage means 71 and an instruction selecting means 72 and inputs a test mode signal 133 indicating that a self-test is conducted to an instruction selecting means 72. The instruction selecting means 72 sends information showing which test instruction stored in the instruction storage means 71 is selected as a select signal 73 to the instruction storage means 71 and also outputs the information as an instruction information signal 134. Then the instruction storage means 71 having received the select signal 73 outputs a random test instruction corresponding to the select signal to a line 140. Consequently, high-speed operation can be tested and a combination of many instructions can be tested.
Bibliography:Application Number: JP19990097281