SEMICONDUCTOR INTEGRATED CIRCUIT AND STORAGE MEDIUM

PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit designed in a shift scanning mode and allowing reduction in the amount of test data, the number of scan data input/output terminals, or a test time. SOLUTION: A semiconductor integrated circuit 101 is designed in a shift scanning mo...

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Bibliographic Details
Main Authors HIKONE KAZUFUMI, HATAKEYAMA KAZUMI, NAKAO NORINOBU, SHIMAMURA KOTARO
Format Patent
LanguageEnglish
Published 22.09.2000
Edition7
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
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Summary:PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit designed in a shift scanning mode and allowing reduction in the amount of test data, the number of scan data input/output terminals, or a test time. SOLUTION: A semiconductor integrated circuit 101 is designed in a shift scanning mode. In this case, two partial circuits 171, 172 constructed of a plurality of FF with a scanning function 111-113, 131-133 working as shift registers and a scan chain 110 connecting the respective FF with a scanning function to each other are provided, and the partial circuits 171, 172 are connected together in a single branch point 153.
Bibliography:Application Number: JP19990061157