MANUFACTURE OF MULTILAYER PRINTED-WIRING BOARD
PROBLEM TO BE SOLVED: To provide a manufacturing method for a multilayer printed-wiring board whose molding defect can be reduced. SOLUTION: A resin varnish 2 is arranged on the surface of every core board 3 comprising a circuit. The resin varnish which is arranged on the surface of every core board...
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Main Author | |
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Format | Patent |
Language | English |
Published |
04.08.2000
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Abstract | PROBLEM TO BE SOLVED: To provide a manufacturing method for a multilayer printed-wiring board whose molding defect can be reduced. SOLUTION: A resin varnish 2 is arranged on the surface of every core board 3 comprising a circuit. The resin varnish which is arranged on the surface of every core board 3 is set to a semihardened state. After that, a plurality of core boards 3 are fed between a pair of long metal foils 2, and a plurality of combined materials 4 are formed. The combined materials 4 are heated and pressurized, and the metal foils 1 and the core boards 3 in the combined materials 4 are integrated. The metal foils 1 are cut between the adjacent combined materials 4. The combined materials 4 in which the metal foils 1 and the core boards 3 are integrated are divided. Cut scraps which are generated at a time when the metal foils 1 between the adjacent combined materials 4 are cut hardly creep between the resin varnishes 2 and the core boards 3. |
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AbstractList | PROBLEM TO BE SOLVED: To provide a manufacturing method for a multilayer printed-wiring board whose molding defect can be reduced. SOLUTION: A resin varnish 2 is arranged on the surface of every core board 3 comprising a circuit. The resin varnish which is arranged on the surface of every core board 3 is set to a semihardened state. After that, a plurality of core boards 3 are fed between a pair of long metal foils 2, and a plurality of combined materials 4 are formed. The combined materials 4 are heated and pressurized, and the metal foils 1 and the core boards 3 in the combined materials 4 are integrated. The metal foils 1 are cut between the adjacent combined materials 4. The combined materials 4 in which the metal foils 1 and the core boards 3 are integrated are divided. Cut scraps which are generated at a time when the metal foils 1 between the adjacent combined materials 4 are cut hardly creep between the resin varnishes 2 and the core boards 3. |
Author | NAKAGAWA TERUO |
Author_xml | – fullname: NAKAGAWA TERUO |
BookMark | eNrjYmDJy89L5WTQ83X0C3VzdA4JDXJV8HdT8A31CfH0cYx0DVIICPL0C3F10Q33BDLcFZz8HYNceBhY0xJzilN5oTQ3g5Kba4izh25qQX58anFBYnJqXmpJvFeAkYGBgZGhmamxhaMxUYoAOcgoEA |
ContentType | Patent |
DBID | EVB |
DatabaseName | esp@cenet |
DatabaseTitleList | |
Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
DeliveryMethod | fulltext_linktorsrc |
Discipline | Medicine Chemistry Sciences |
Edition | 7 |
ExternalDocumentID | JP2000216538A |
GroupedDBID | EVB |
ID | FETCH-epo_espacenet_JP2000216538A3 |
IEDL.DBID | EVB |
IngestDate | Fri Jul 19 12:07:43 EDT 2024 |
IsOpenAccess | true |
IsPeerReviewed | false |
IsScholarly | false |
Language | English |
LinkModel | DirectLink |
MergedId | FETCHMERGED-epo_espacenet_JP2000216538A3 |
Notes | Application Number: JP19990017061 |
OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20000804&DB=EPODOC&CC=JP&NR=2000216538A |
ParticipantIDs | epo_espacenet_JP2000216538A |
PublicationCentury | 2000 |
PublicationDate | 20000804 |
PublicationDateYYYYMMDD | 2000-08-04 |
PublicationDate_xml | – month: 08 year: 2000 text: 20000804 day: 04 |
PublicationDecade | 2000 |
PublicationYear | 2000 |
RelatedCompanies | MATSUSHITA ELECTRIC WORKS LTD |
RelatedCompanies_xml | – name: MATSUSHITA ELECTRIC WORKS LTD |
Score | 2.519223 |
Snippet | PROBLEM TO BE SOLVED: To provide a manufacturing method for a multilayer printed-wiring board whose molding defect can be reduced. SOLUTION: A resin varnish 2... |
SourceID | epo |
SourceType | Open Access Repository |
SubjectTerms | CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS |
Title | MANUFACTURE OF MULTILAYER PRINTED-WIRING BOARD |
URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20000804&DB=EPODOC&locale=&CC=JP&NR=2000216538A |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1bS8MwFD7MKeqbTmU6lSLSt2i7Zd36UKRNW7ayXiitzqfRrS2IMIer-Pc9iavuaW8hgVz5cr6TcwnAvVZ281zRM4KnmxOKMplkPUpJQTO11Es6yHOR7TPQRin1pv1pA97rWBiRJ_RbJEdERC0Q75W4r1f_j1i28K1cP87fsOrjyU0MW661Y06AqGxbhhOFdshkxgwvkoNYtHVVDeFt7sE-8ugBh4PzbPGwlNW2THFP4CDC7pbVKTSKZQuOWP31WgsO_Y3FG4sb8K3P4ME3g9Q1GXdUkEJX8tNJMp6Yr04scZ8GvILIy5g7N0hWaMb2Ody5TsJGBAee_S1z5kVbk-xdQBP1_6IN0gJJD7IUVIFRe0C6k-l6X0EpombcMKsNL6Gzo6Orna0dOP6NLR8ShV5Ds_r8Km5QylbzW7E7PyVHeiM |
link.rule.ids | 230,309,783,888,25576,76876 |
linkProvider | European Patent Office |
linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV1bT8IwFD5BNOKbokbFy2LM3qoMymAPxIxuC5u7ZdkUn5bBtsSYIJEZ_76nFZQn3po26TVfz3d6LgW4U8tOnre1jODp5oSiTCZZl1JS0EwptZL281xk-_TVcUKdSW9Sg_d1LIzIE_otkiMiomaI90rc14v_RyxD-FYuH6ZvWPXxaMVDQ15rx5wAUdkYDc0wMAImMzZ0QtmPRFtHURHe-g7sIsfucziYzyMelrLYlCnWIeyF2N28OoJaMW9Cg62_XmvCvreyeGNxBb7lMdx7up9YOuOOClJgSV7ixrarv5qRxH0a8AoiLzZ3bpBGgR4ZJ3BrmTEbExw4_Vtm6oQbk-yeQh31_-IMpBmSHmQpqAKj9oB0J9O0XhuliJJxw6w6OIfWlo4utrbeQGMce27q2v5TCw5-48wHpE0voV59fhVXKHGr6bXYqR8K-X0W |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=MANUFACTURE+OF+MULTILAYER+PRINTED-WIRING+BOARD&rft.inventor=NAKAGAWA+TERUO&rft.date=2000-08-04&rft.externalDBID=A&rft.externalDocID=JP2000216538A |