NONVOLATILE SEMICONDUCTOR STORAGE DEVICE AND ITS TESTING METHOD
PROBLEM TO BE SOLVED: To provide the nonvolatile semiconductor storage device which can test through single measurement whether or not the thresholds of all memory cells are in a proper range after all the memory cells are set in a written or erased state. SOLUTION: This device is provided with a hi...
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Main Author | |
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Format | Patent |
Language | English |
Published |
07.04.2000
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | PROBLEM TO BE SOLVED: To provide the nonvolatile semiconductor storage device which can test through single measurement whether or not the thresholds of all memory cells are in a proper range after all the memory cells are set in a written or erased state. SOLUTION: This device is provided with a high-order (row) address decoder 3 equipped with a word line selecting circuit 10 which activates all word lines by invalidating a decode signal HAD for selecting a word line WL in specific test mode, a 1st external terminal 8, a word line potential switching circuit 7 which controls the potentials of all activated word lines with a potential supplied to a 1st external terminal, a low-order (column) address decoder 4 equipped with a bit line selecting circuit 11 which invalidates a decode signal LAD for selecting a bit line BL and connects all the bit lines to data output lines 6, a 2nd external terminal 9, and a switching circuit SWT which connects the data output lines 6 where all the bit lines are connected to the 2nd external terminal 9. |
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Bibliography: | Application Number: JP19980273242 |