SEMICONDUCTOR MEMORY
PROBLEM TO BE SOLVED: To stabilize a deciding operation in the case of existing Vt of a cell near a standard value in a write decision of a flash memory. SOLUTION: Bit lines BL1, BL2 are respectively connected to memory cells 1-1, 1-2, and the line BL1 is connected to a sense amplifier 4 and a write...
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Main Author | |
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Format | Patent |
Language | English |
Published |
21.01.2000
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | PROBLEM TO BE SOLVED: To stabilize a deciding operation in the case of existing Vt of a cell near a standard value in a write decision of a flash memory. SOLUTION: Bit lines BL1, BL2 are respectively connected to memory cells 1-1, 1-2, and the line BL1 is connected to a sense amplifier 4 and a write circuit 5 via a selecting gate 3. The amplifier 4 is connected to an input/output bus DIO via an output buffer 8. A value of input/output bus DIO fed via a write data latch 7 and an output ROUT fed via a decision data latch 6 are input to the circuit 5. An output BBD is input to the amplifier 4. The amplifier 4 has two write decision levels, and switches the both according to the output BBD. The level in the case of the data BBD = '1' is set higher than in the case of the data = '0'. Thus, the stable decision data is output to the bus DIO immediately after Vt of the cell 101 exceeds the standard value. |
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Bibliography: | Application Number: JP19980184844 |