PROCESSO PER LA REALIZZAZIONE DI UN DISPOSITIVO DI MEMORIA INTEGRATO SU UN SUBSTRATO SEMICONDUTTORE E COMPRENDENTE CELLE DI MEMORIA A NANOCRISTALLI E TRANSISTORI CMOS
An embodiment of a process is disclosed herein for fabricating a memory device integrated on a semiconductor substrate and comprising at least a nanocrystal memory cell and CMOS transistors respectively formed in a memory area and in a circuitry area. According to an embodiment, a process includes f...
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Main Author | |
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Format | Patent |
Language | Italian |
Published |
05.12.2008
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Online Access | Get full text |
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Summary: | An embodiment of a process is disclosed herein for fabricating a memory device integrated on a semiconductor substrate and comprising at least a nanocrystal memory cell and CMOS transistors respectively formed in a memory area and in a circuitry area. According to an embodiment, a process includes forming a nitride layer having an initial thickness, placed above a nanocrystal layer, in the memory area and the formation in the circuitry area of at least one submicron gate oxide. The process also provides that the initial thickness is such as to allow a complete transformation of the nitride layer into an oxide layer at upon formation of said at least one submicron gate oxide. |
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Bibliography: | Application Number: IT2007MI01140 |