CIRCUITO DI RIMEMORIZZAZIONE PER UNA MEMORIA SEMICONDUTRICE

Disclosed is a restore circuit for restoring an integrated semiconductor storage array having storage cells consisting of bipolar transistors. The restore circuit includes a reference voltage generator, an impedance converter, and switches to connect the reference voltage generator and the impedance...

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Bibliographic Details
Main Authors WIEDMANN SIEGFRIED KURT, HEUBER KLAUS
Format Patent
LanguageItalian
Published 17.12.1986
Edition4
Subjects
BASIC ELECTRIC ELEMENTS
CONTROLLING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
INFORMATION STORAGE
PHYSICS
REGULATING
SEMICONDUCTOR DEVICES
STATIC STORES
SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
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Summary:Disclosed is a restore circuit for restoring an integrated semiconductor storage array having storage cells consisting of bipolar transistors. The restore circuit includes a reference voltage generator, an impedance converter, and switches to connect the reference voltage generator and the impedance converter to the storage array. The reference voltage generating circuit includes a current source and at least one reference storage cell identical in construction to the storage cells of the array. The reference voltage generating circuit provides a reference voltage to the impedance converter which supplies a second reference voltage to the array at a greatly reduced impedance. The equivalent circuit of the storage cells is that of a capacitor in parallel with a diode. Thus, the impedance converter provides an initial surge of capacitive current which restores the cells, followed by a standby current which is a function of the diode characteristics of the cell equivalent circuit.
Bibliography:Application Number: IT19800023021