Network-based computational accelerator

Data processing apparatus includes a host processor and a network interface controller (NIC), which is configured to couple the host processor to a packet data network. A memory holds a flow state table containing context information with respect to computational operations to be performed on multip...

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Bibliographic Details
Main Author SHACHAR RAINDEL
Format Patent
LanguageEnglish
Hebrew
Published 31.07.2019
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Summary:Data processing apparatus includes a host processor and a network interface controller (NIC), which is configured to couple the host processor to a packet data network. A memory holds a flow state table containing context information with respect to computational operations to be performed on multiple packet flows conveyed between the host processor and the network. Acceleration logic is coupled to perform the computational operations on payloads of packets in the multiple packet flows using the context information in the flow state table.
Bibliography:Application Number: IL20150238690